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 THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS
MV5087
DS3125-2.0 June 1993
MV5087
DTMF GENERATOR
The MV5087 is fabricated using ISO-CMOS high density technology and offers low power and wide voltage operation. An inexpensive 3.58MHz TV crystal completes the reference oscillator. From this frequency are derived 8 different sinusoidal frequencies which, when appropriately mixed, provide Dual-Tone Multi-Frequency (DTMF) tones. Inputs are compatible with either a standard 2-of-8 or a single contact (form A) keyboard. The keyboard entries determine the correct division of the reference frequency by the row and column counters. D-to-A conversion, using R-2R ladder networks, results in a staircase approximation of a sinewave with low total distortion. Frequency and amplitude stability over operating voltage and temperature range are maintained within industry specifications.
+VDD XMITR COLUMN 1 COLUMN 2 COLUMN3 VSS OSC IN OSC OUT
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
TONE OUT SINGLE TONE INHIBIT ROW 1 ROW 2 ROW 3 ROW 4 MUTE COLUMN 4
DP16 MP16
FEATURES
s s s s s s s s s Pin-for-Pin Replacement for MK5087 Low Standby Power Minimum External Parts Count 3.5V to 10V Operatlon 2-of-8 Keyboard or Calculator-Type Single Contact (Form A) Keyboard Input On-Chip Regulation of Output Tone Mute and Transmitter Drivers On-Chip High Accuracy Tones Provided by 3.58MHz Crystal Oscillator Pin-Selectable Inhibit of Single Tone Generation
ROW INPUTS
Figure 1: Pin connections - top view
APPLICATIONS
DTMF Signalling for s Telephone Sets s Mobile Radio s Remote Control s Point-of-Sale and Banking Terminals s Process Control
{
1 2 3 4
RR RR VDD RR RR VDD VDD
SINGLE TONE INHIBIT
MV5087
KEYBOARD LOGIC SINE WAVE COUNTER D/A CONVERTER
VDD VREF
OSC OUT
4
ROW COUNTER
+ TONE OUT
VDD
OSC IN
COLUMN COUNTER
SINE WAVE COUNTER
D/A CONVERTER
KEYBOARD LOGIC
VSS RC VSS RC RC RC
XMITR TRANSMIT/MUTE LOGIC MUTE OUT
{
COLUMN INPUTS
1
2
3
4
Figure 2: Functional block diagram
1
MV5087
ABSOLUTE MAXIMUM RATINGS
Min. VDD - VSS Voltage on any pin Current on any pin Operating temperature Storage temperature -0.3V VSS - 0.3V -40C -65C Max. 10.5V VDD + 0 3V 10 mA +85C +150C Power dissipation Derate 16 mW/C above 75C (All leads soldered to PCB) Min. Max. 850 mW
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless othenwise stated): Tamb = +25C, VDD = 3.5V to 10V Characteristics Operating Supply Voltage Standby Supply Current Operating Supply Current SINGLE TONE Input High Voltage INHIBIT Input Low Voltage Input Resistance ROW 1-4 Input High Voltage Input Low Voltage COLUMN 1-4 Input High Voltage Input Low Voltage XMITR Source Current Leakage Current Sink Current Source Current Symbol VDD IDDS IDD VIH VIL RIN VIH VIL VIH VIL IOH IOZ IOL IOH Min. 3.5 0.2 0.5 1.0 5.0 0.7VDD 0 60 0.9VDD 0.3VDD 0.7VDD 0.1VDD -15 -50 0.5 1.0 -0.5 -1.0 -25 -100 0.1 Typ. Max. 10 100 200 2.0 10.0 VDD 0.3VDD Units V uA uA mA mA V V K V V V V mA mA uA mA mA mA mA Ref. to VSS VDD = 3.5V VDD = 10V VDD = 3.5V VDD = 10V
SUPPLY
No Key Depressed All outputs Unloaded One Key Depressed All outputs Unloaded
INPUTS
10
MUTE
VDD = 3.5V, VOH = 2.5V VDD = 10V, VOH = 8V VDD = 10V, VOH = 0V VDD = 3.5V, VOL = 0.5V VDD = 10V, VOL = 0.5V VDD = 3.5V, VOH = 3.0V VDD = 10V, VOH = 9.5V
No Keyboard Entry Keyboard Entry No Keyboard Entry Keyboard Entry
AC ELECTRICAL CHARACTERISTICS
Test conditions (unless othenwise stated): Tamb = +25C, VDD = 3.5V to 10V Characteristics TONE OUT Row Tone Output Voltage Column Tone Output Voltage External Load Impedance OUTPUT DISTORTION Symbol VOR VOC RL Min. 320 400 700 300 -20 Typ. 400 500 Max. 500 630 Units mVRMS mVRMS dB VDD = 3.5V VDD = 10V Total out-of-band power relative to sum of row and column fundamental power Single Tone RL = 1K
OUTPUTS
PRE EMPHASIS, High Band Tone Output Rise Time
1 tr 3
3 5
dB ms
2
MV5087
PIN FUNCTIONS
PIN NAME VDD 2 XMITR DESCRIPTION Positive Power Supply Emitter output of a bipolar transistor whose collector is connected to VDD. With no keyboard input this output remains at VDD and a keyboard input changes the output to a high impedance state. The state of Single Tone Inhibit input has no effect on XMITR output.
1
3,4,5,9
Column 1-4
These inputs are held at VSS by resistors RC and sense a valid logic level (approx /2 VDD) when tied to a ROW input.
VSS 7,8 OSC In, OSC Out Mute
Negative Power Supply (OV) On-chip inverter completes the oscillator when a 3,579545 MHz crystal is connected to these pins. OSC In is the inverter input and OSC Out is the output. This CMOS Output switches to VSS with no keyboard input and to VDD with a keyboard input. This output is unaffected by the state of Single Tone Inhibit. These inputs are held at VDD by resistors RR and sense a valid logic level (Approx 1 /2 VDD) when tied to a column input. This input has a pull-up resistor to VDD and when left unconnected or tied to VDD, single or dual tones may be generated. When Vss is applied dual tones only are generated and no input combinations will cause generation of a single tone. Emitter output of a bipolar NPN transistor whose collector is tied to VDD. Input to this transistor is from an op-amp which mixes, and regulates the output level of, the row and column tones.
10
11,12,13,14
Row 1-4
15
Single Tone Inhibit
16
Tone Out
ROW AND COLUMN INPUTS
These inputs are compatible with the standard 2-of-8 keyboard, single contact (form A) keyboard and electronic input. Figures 3 and 4 show these input configurations, and Fig. 5 shows the internal structure of these inputs. When operating with a keyboard, dual tones are generated when any single button is pushed. Single tones are generated when more than one button is pushed in any row or column. No tones are generated when diagonallypositioned buttons are simultaneously pressed. An electronic input to a single column generates that single column tone. Inputs to multiple columns generates no tone. An electronic input to a single row generates no tone and a single row tone may be generated only by activating 2 columns and the desired row.
VDD
COL CLASS A KEYBOARD ROW
RR ROW INPUT
COL ROW
STATIC PROTECTION
Row input sensing circuit
2 OF 8 DTMF KEYBOARD
COLUMN INPUT RC VSS
STATIC PROTECTION
Column input sensing circuit
Figure 3: Keyboard configuration
VDD VSS VDD VSS COLUMN ROW
Figure 5: Row and column inputs
Figure 4: Electronic input
3
MV5087
OUTPUT FREQUENCY
Table 1 shows the output frequency deviation from the standard DTMF frequencies when a 3.58MHz crystal is used as the reference. The row and column output waveforms are digitally synthesised using R-2R D-to-A converters (see Fig.6), resulting in a `staircase' approximation to a sinewave. An opamp mixes these tones to produce a dual-tone waveform. Single tone distortion is typically better than 7% and all distortion components of the mixed dual-tone should be 30dB relative to the strongest fundamental (column tone).
Standard DTMF (Hz) Tone Output Frequency Using 3.5795545 MHz Crystal 701.3 771.4 857.2 935.1 1215.9 1331.7 1471.9 1645.0 % Deviation from Standard
Row
Column
f1 f2 f3 f4 f5 f6 f7 f8
697 770 852 941 1209 1336 1477 1633
+0.62 +0.19 +0.61 -0.63 +0.57 -0.32 -0.35 +0.73
Low Group
High Group
Table 1: Output frequency deviation
VOUT
a)
t VOUT
b)
t
Figure 6: Typical sinewave output (a) Row tones (b) Column tones
DISTORTION MEASUREMENTS
THD for the single tone is defined by: 100 (
2 2 V2 + V3f + V2 + ---- Vnf ) % 2f 4f
V fundamental Where V2f --- Vnf are the Fourier components of the waveform. THD for the dual tone is defined by: 100 (
2 V2 + V3R+ V2 + V2 + V2 --- V2 + V2 ) 2R nR 2C 3C nc IMD
V2
ROW
+ V2
COL
where
VROW is the row fundamental amplitude VCOL is the column fundamental amplitude V2R--VnR are the Fourier component amplitudes of the row frequencies V2C--VnC are the Fourier component amplitudes of the column frequencies VIMD is the sum of all intermodulation components.
4
MV5087
VDD
SINGLE TONE INHIBIT
COL 1
3
1
15 7 3.58 MHz XTAL 8 XMITR TONE OUTPUT RL VSS
COL 2 4 COL 3 5 COL 4 9 1 4 7 2 5 8 0 3 6 9 # A B C D ROW 1 ROW 2 14 13
MV5087 2
16
ROW 3 12 ROW 4 11 6 10
*
VSS
MUTE
Figure 7: Connection diagram
5


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